SVR4 TSディスパッチャテーブル
あるSVR4(System V Release 4)システムのTS(タイムシェアリング)ディスパッチャテーブルを図1に示します。
#Time Sharing Dispatcher Configuration |
RES=1000 |
|
|
|
|
|
# |
ts_quantum |
ts_tqexp |
ts_slpret |
ts_maxwait |
ts_lwait |
PRIORITY |
LEVEL |
|
1000 |
0 |
10 |
5 |
10 |
# |
0 |
|
1000 |
0 |
11 |
5 |
11 |
# |
1 |
|
1000 |
1 |
12 |
5 |
12 |
# |
2 |
|
1000 |
1 |
13 |
5 |
13 |
# |
3 |
|
1000 |
2 |
14 |
5 |
14 |
# |
4 |
|
1000 |
2 |
15 |
5 |
15 |
# |
5 |
|
1000 |
3 |
16 |
5 |
16 |
# |
6 |
|
1000 |
3 |
17 |
5 |
17 |
# |
7 |
|
1000 |
4 |
18 |
5 |
18 |
# |
8 |
|
1000 |
4 |
19 |
5 |
19 |
# |
9 |
|
800 |
5 |
20 |
5 |
20 |
# |
10 |
|
800 |
5 |
21 |
5 |
21 |
# |
11 |
|
800 |
6 |
22 |
5 |
22 |
# |
12 |
|
800 |
6 |
23 |
5 |
23 |
# |
13 |
|
800 |
7 |
24 |
5 |
24 |
# |
14 |
|
800 |
7 |
25 |
5 |
25 |
# |
15 |
|
800 |
8 |
26 |
5 |
26 |
# |
16 |
|
800 |
8 |
27 |
5 |
27 |
# |
17 |
|
800 |
9 |
28 |
5 |
28 |
# |
18 |
|
800 |
9 |
29 |
5 |
29 |
# |
19 |
|
600 |
10 |
30 |
5 |
30 |
# |
20 |
|
600 |
11 |
31 |
5 |
31 |
# |
21 |
|
600 |
12 |
32 |
5 |
32 |
# |
22 |
|
600 |
13 |
33 |
5 |
33 |
# |
23 |
|
600 |
14 |
34 |
5 |
34 |
# |
24 |
|
600 |
15 |
35 |
5 |
35 |
# |
25 |
|
600 |
16 |
36 |
5 |
36 |
# |
26 |
|
600 |
17 |
37 |
5 |
37 |
# |
27 |
|
600 |
18 |
38 |
5 |
38 |
# |
28 |
|
600 |
19 |
39 |
5 |
39 |
# |
29 |
|
400 |
20 |
40 |
5 |
40 |
# |
30 |
|
400 |
21 |
41 |
5 |
41 |
# |
31 |
|
400 |
22 |
42 |
5 |
42 |
# |
32 |
|
400 |
23 |
43 |
5 |
43 |
# |
33 |
|
400 |
24 |
44 |
5 |
44 |
# |
34 |
|
400 |
25 |
45 |
5 |
45 |
# |
35 |
|
400 |
26 |
46 |
5 |
46 |
# |
36 |
|
400 |
27 |
47 |
5 |
47 |
# |
37 |
|
400 |
28 |
48 |
5 |
48 |
# |
38 |
|
400 |
29 |
49 |
5 |
49 |
# |
39 |
|
200 |
30 |
50 |
5 |
50 |
# |
40 |
|
200 |
31 |
50 |
5 |
50 |
# |
41 |
|
200 |
32 |
51 |
5 |
51 |
# |
42 |
|
200 |
33 |
51 |
5 |
51 |
# |
43 |
|
200 |
34 |
52 |
5 |
52 |
# |
44 |
|
200 |
35 |
52 |
5 |
52 |
# |
45 |
|
200 |
36 |
53 |
5 |
53 |
# |
46 |
|
200 |
37 |
53 |
5 |
53 |
# |
47 |
|
200 |
38 |
54 |
5 |
54 |
# |
48 |
|
200 |
39 |
54 |
5 |
54 |
# |
49 |
|
100 |
40 |
55 |
5 |
55 |
# |
50 |
|
100 |
41 |
55 |
5 |
55 |
# |
51 |
|
100 |
42 |
56 |
5 |
56 |
# |
52 |
|
100 |
43 |
56 |
5 |
56 |
# |
53 |
|
100 |
44 |
57 |
5 |
57 |
# |
54 |
|
100 |
45 |
57 |
5 |
57 |
# |
55 |
|
100 |
46 |
58 |
5 |
58 |
# |
56 |
|
100 |
47 |
58 |
5 |
58 |
# |
57 |
|
100 |
48 |
59 |
5 |
59 |
# |
58 |
|
100 |
49 |
59 |
5 |
59 |
# |
59 |
|
図1.SVR4のTSディスパッチャテーブル
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